Leakage current has become a significant contributor to standby power dissipation of Complementary Metal-Oxide Semiconductor (CMOS) integrated circuits (ICs), and is commonly measured at the transistor level by the transistor parameter off-state current (Ioff). Ioff is the drain current when the applied gate voltage is zero, with some applied drain-to-source voltage (Vdd).
Ioff is influenced by the device's threshold voltage (Vt), channel physical dimensions, channel/surface doping profile, drain/source junction depth, gate dielectric thickness, and Vdd. Ioff in long-channel devices is known to be dominated by reverse-bias leakage from the drain-well junctions and the well-substrate junctions. Short-channel transistors typically require lower power supply levels to reduce their internal electric fields and power consumption. Use of lower power supply levels forces a reduction in the Vt, which can cause a substantial increase in Ioff. Accordingly, IC standby power can be reduced if reverse bias well-substrate leakage can be reduced.